Lightweight and Trust-aware Routing in NoC-based SoCs cover image

Lightweight and Trust-aware Routing in NoC-based SoCs


Subodha Charles Prabhat Mishra


IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Limassol, Cyprus, July 6-8, 2020


Abstract

Increasing System-on-Chip (SoC) design complexity coupled with time-to-market constraints have motivated manufacturers to integrate several third-party Intellectual Property (IP) cores in their SoC designs. IPs acquired from potentially untrusted vendors can be a serious threat to the trusted IPs when they are connected using the same Network-on-Chip (NoC). For example, the malicious IPs can tamper packets as well as degrade SoC performance by launching DoS attacks. While existing authentication schemes can check the data integrity of packets, it can introduce unacceptable overhead on resource-constrained SoCs. In this paper, we propose a lightweight and trust-aware routing mechanism to bypass malicious IPs during packet transfers. This reduces the number of re-transmissions due to tampered data, minimizes DoS attack risk, and as a result, improves SoC performance even in the presence of malicious IPs. Experimental results demonstrate significant improvement in both performance and energy efficiency with minor impact on area overhead.


View Full Paper

PDF


Citation


@article{charles2020lightweighttrust,
  title={Lightweight and Trust-aware Routing in NoC Based SoCs},
  author={Charles, Subodha and Mishra, Prabhat},
  journal={IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
  year={2020},
  publisher={IEEE}
}